Tadao Nakamura received his PhD in Electronics using Computer Aided Design in 1972 from Tohoku University. Nakamura is currently a professor in the Department of Computer and Mathematical Sciences at Tohoku University. He was founding chair of the department in 1993. Prior to that, he was a professor in the Department of Mechanical (Machine Intelligence and Systems) Engineering at Tohoku University and a Visiting Lecturer in the Department of Information Science at the University of Tokyo. From 1994 to 1998, he was a Visiting Professor of Electrical Engineering at Stanford University. His recent research interests are in computer architecture, especially pipelining based microarchitecture, and low-power concepts in chips, in general. He has been Organizing Committee Chair of the COOL Chips conference series fully sponsored by the IEEE Computer Society. Nakamura was elected Fellow of the IEEE in 2002 for contributions to pipelined computer architecture and computer engineering education.
2004 Taylor L. Booth Award
“For leadership in the reform of advanced information science education and for important and substantive contributions to information science and computer engineering education in Japan.”
Learn more about the Taylor L. Booth Award